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ITC
2003
IEEE
162views Hardware» more  ITC 2003»
14 years 1 months ago
FPGA Interconnect Delay Fault Testing
The interconnection network consumes the majority of die area in an FPGA. Presented is a scalable manufacturing test method for all SRAM-based FPGAs, able to detect multiple inter...
Erik Chmelar
DSN
2008
IEEE
14 years 2 months ago
Using likely program invariants to detect hardware errors
In the near future, hardware is expected to become increasingly vulnerable to faults due to continuously decreasing feature size. Software-level symptoms have previously been used...
Swarup Kumar Sahoo, Man-Lap Li, Pradeep Ramachandr...
SECON
2007
IEEE
14 years 2 months ago
On the Prevalence of Sensor Faults in Real-World Deployments
—Various sensor network measurement studies have reported instances of transient faults in sensor readings. In this work, we seek to answer a simple question: How often are such ...
Abhishek Sharma, Leana Golubchik, Ramesh Govindan
ANSS
2001
IEEE
13 years 11 months ago
Fault Identification in Networks by Passive Testing
In this paper, we employ the finite state machine (FSM) model for networks to investigate fault identification using passive testing. First, we introduce the concept of passive te...
Raymond E. Miller, Khaled A. Arisha
DSN
2004
IEEE
13 years 11 months ago
Fault Detection and Isolation Techniques for Quasi Delay-Insensitive Circuits
This paper presents a novel circuit fault detection and isolation technique for quasi delay-insensitive asynchronous circuits. We achieve fault isolation by a combination of physi...
Christopher LaFrieda, Rajit Manohar