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» Procedural Modeling of Interconnected Structures
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WCE
2007
13 years 8 months ago
A Patch-by-Patch Shape Matching Procedure for Rigid Body Docking
Abstract—Docking simulates molecular interactions. Protein - protein docking, owing to the sizes of molecules, is a very challenging problem. As the number of degrees of freedom ...
Vipin K. Tripathi
CVPR
2012
IEEE
11 years 10 months ago
Parameter-free/Pareto-driven procedural 3D reconstruction of buildings from ground-level sequences
In this paper we address multi-view reconstruction of urban environments using 3D shape grammars. Our formulation expresses the solution to the problem as a shape grammar parse tr...
Loïc Simon, Olivier Teboul, Panagiotis Koutso...
ICCAD
2003
IEEE
123views Hardware» more  ICCAD 2003»
14 years 4 months ago
The Y-Architecture for On-Chip Interconnect: Analysis and Methodology
The Y-architecture for on-chip interconnect is based on pervasive use of 0-, 120-, and 240-degree oriented semi-global and global wiring. Its use of three uniform directions explo...
Hongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Io...
GLVLSI
2003
IEEE
186views VLSI» more  GLVLSI 2003»
14 years 23 days ago
A fast simulation approach for inductive effects of VLSI interconnects
Modeling on-chip inductive effects for interconnects of multigigahertz microprocessors remains challenging. SPICE simulation of these effects is very slow because of the large num...
Xiaoning Qi, Goetz Leonhardt, Daniel Flees, Xiao-D...
EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
13 years 11 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng