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» Process Isolation for Reconfigurable Hardware
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ISCAS
2006
IEEE
101views Hardware» more  ISCAS 2006»
14 years 1 months ago
A cost-effective reconfigurable accelerator for platform-based SOC design
In this paper, we propose a cost-effective reconfigurable accelerator for the platform-based system-on-a-chip (SoC) design. Based on the proposed design methodology, the reconfigu...
Lan-Da Van, Hsin-Fu Luo, Nien-Hsiang Chang, Chun-M...
DATE
2002
IEEE
83views Hardware» more  DATE 2002»
14 years 20 days ago
Reconfigurable SoC - What Will it Look Like?
The argument against ASIC SoCs is that they have always taken too long and cost too much to design. As new process technologies come on line, the issue of inflexible, unyielding d...
J. Bryan Lewis, Ivo Bolsens, Rudy Lauwereins, Chri...
EIT
2008
IEEE
13 years 9 months ago
Design and analysis of efficient reconfigurable wavelet filters
Abstract--Real-time image and multimedia processing applications such as video surveillance and telemedicine can have dynamic requirements of system latency, throughput, and power ...
Amit Pande, Joseph Zambreno
ARC
2007
Springer
152views Hardware» more  ARC 2007»
13 years 7 months ago
Statistical signal processing approaches to fault detection
: The parity space approach to fault detection and isolation (FDI) has been developed during the last twenty years, and the focus here is to describe its application to stochastic ...
Fredrik Gustafsson
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
13 years 11 months ago
VLSI Design of Multi Standard Turbo Decoder for 3G and Beyond
Turbo decoding architectures have greater error correcting capability than any other known code. Due to their excellent performance turbo codes have been employed in several trans...
Imran Ahmed, Tughrul Arslan