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» Process Isolation for Reconfigurable Hardware
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FPL
2007
Springer
120views Hardware» more  FPL 2007»
14 years 1 months ago
Design Methodology and Trade-offs Analysis for Parameterized Dynamically Reconfigurable Processor Arrays
In this paper, we propose a Dynamically Reconfigurable Processor Array (DRPA) generator which can generate various types of DRPAs. Our target DRPA architecture is fully parameter...
Yohei Hasegawa, Hideharu Amano
ASPDAC
1995
ACM
116views Hardware» more  ASPDAC 1995»
13 years 11 months ago
A datapath synthesis system for the reconfigurable datapath architecture
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Reiner W. Hartenstein, Rainer Kress
IEEEHPCS
2010
13 years 2 months ago
XPSoC: A reconfigurable solution for multimedia contents protection
Network Multimedia data also need to be encrypted to protect private content and access control. Considering performance constraints and embedded system issues, many hardware solu...
Linfeng Ye, Jean-Philippe Diguet, Guy Gogniat
ERSA
2010
187views Hardware» more  ERSA 2010»
13 years 5 months ago
An Open Source Circuit Library with Benchmarking Facilities
In this paper, we introduce the open-source PivPav backend tool for reconfigurable computing. Essentially, PivPav provides an interface to a library of digital circuits that are ke...
Mariusz Grad, Christian Plessl
ERSA
2006
128views Hardware» more  ERSA 2006»
13 years 9 months ago
Reconfigurable Turbo/Viterbi Channel Decoder in the Coarse-Grained Montium Architecture
Mobile wireless communication systems become multi-mode systems. These future mobile systems employ multiple wireless communication standards, which are different by means of algor...
Gerard K. Rauwerda, Gerard J. M. Smit, Casper R. W...