468 search results - page 38 / 94 » Process Migration Effects on Memory Performance of Multiproc... |
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents a multilevel (ML) Flash memory onchip error correction system design based on the concept of trellis coded modulation (TCM). This is motivated by the non-trivi...
DSN
2011
IEEE
12 years 8 months ago
2011
IEEE
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
IWMM
2011
Springer
12 years 11 months ago
2011
Springer
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
IFL
2000
Springer
14 years 11 days ago
2000
Springer
Sac is a functional array processing language particularly designed with numerical applications in mind. In this field the runtime performance of programs critically depends on the...
GSEM
2004
Springer
14 years 2 months ago
2004
Springer
Occam is a parallel processing language designed by a team at INMOS in conjunction with the design of the transputer processor, and based on Sir T. Hoare's ideas of Communica...