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ISCAS
2008
IEEE
132views Hardware» more  ISCAS 2008»
14 years 1 months ago
Thermal aware clock synthesis considering stochastic variation and correlations
— In this paper, we have proposed a thermal aware routing based parameterization to generate a clock model that takes the stochastic temperature variation into consideration. The...
Chunchen Liu, Ruei-Xi Chen, Jichang Tan, Sharon Fa...
ICCAD
2005
IEEE
95views Hardware» more  ICCAD 2005»
14 years 4 months ago
TACO: temperature aware clock-tree optimization
— In this paper, an efficient linear time algorithm TACO is proposed for the first time to minimize the worst case clock skew in the presence of on-chip thermal variation. TACO...
Minsik Cho, Suhail Ahmed, David Z. Pan
DAC
2009
ACM
14 years 7 days ago
Serial reconfigurable mismatch-tolerant clock distribution
We present an unconventional clock distribution that emphasizes flexibility and layout independence. It suits a variety of applications, clock domain shapes and sizes using a modu...
Atanu Chattopadhyay, Zeljko Zilic
DAC
2008
ACM
14 years 8 months ago
Type-matching clock tree for zero skew clock gating
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
Chia-Ming Chang, Shih-Hsu Huang, Yuan-Kai Ho, Jia-...
DAC
2008
ACM
14 years 8 months ago
Robust chip-level clock tree synthesis for SOC designs
A key problem that arises in System-on-a-Chip (SOC) designs of today is the Chip-level Clock Tree Synthesis (CCTS). CCTS is done by merging all the clock trees belonging to differ...
Anand Rajaram, David Z. Pan