63 search results - page 9 / 13 » Process variation robust clock tree routing |
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
The NETWORK-ON-CHIP (NOC) interconnection paradigm has been gaining momentum thanks to its flexibility, scalability and suitability to deep submicron technology processes. The ne...
GECCO
2004
Springer
14 years 28 days ago
2004
Springer
In this paper, we consider a variation of the Euclidean Steiner Tree Problem in which the space underlying the set of nodes has a specified non-uniform cost structure. This proble...
SENSYS
2004
ACM
14 years 1 months ago
2004
ACM
Previous approaches for computing duplicate-sensitive aggregates in sensor networks (e.g., in TAG) have used a tree topology, in order to conserve energy and to avoid double-count...
CVIU
2011
13 years 2 months ago
2011
In this paper we propose an approach for action recognition based on a vocabulary of local motion-appearance features and fast approximate search in a large number of trees. Large...
SAC
2006
ACM
14 years 1 months ago
2006
ACM
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...