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ISVLSI
2008
IEEE
156views VLSI» more  ISVLSI 2008»
14 years 3 months ago
Cache Power Reduction in Presence of Within-Die Delay Variation Using Spare Ways
The share of leakage in cache power consumption increases with technology scaling. Choosing a higher threshold voltage (Vth) and/or gate-oxide thickness (Tox) for cache transistor...
Maziar Goudarzi, Tadayuki Matsumura, Tohru Ishihar...
DOCENG
2006
ACM
14 years 2 months ago
Solving the simple continuous table layout problem
Automatic table layout is required in web applications. Unfortunately, this is NP-hard for reasonable layout requirements such as minimizing table height for a given width. One ap...
Nathan Hurst, Kim Marriott, David W. Albrecht
EH
1999
IEEE
122views Hardware» more  EH 1999»
14 years 1 months ago
The MorphoSys Dynamically Reconfigurable System-on-Chip
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
Guangming Lu, Hartej Singh, Ming-Hau Lee, Nader Ba...
ACRI
2006
Springer
14 years 20 days ago
Merging Cellular Automata for Simulating Surface Effects
This paper describes a model of three-dimensional cellular automata allowing to simulate different phenomena in the fields of computer graphics or image processing. Our method allo...
Stéphane Gobron, Denis Finck, Philippe Even...
FPL
2006
Springer
91views Hardware» more  FPL 2006»
14 years 17 days ago
Multi-Bit Carry Chains for High-Performance Reconfigurable Fabrics
Ripple-carry architectures are the norm in today's reconfigurable fabrics. They are simple, require minimal routing, and are easily formed across arbitrary cells in a fabric....
Michael T. Frederick, Arun K. Somani