2700 search results - page 111 / 540 » Processor Architectures for Ontogenesis |
141
click to vote
DATE
2000
IEEE
15 years 8 months ago
2000
IEEE
This paper presents a methodology to retarget the technique of compiled simulation for Digital Signal Processors DSPs using the modeling language LISA. In the past, the principl...
147
click to vote
DSD
2004
IEEE
15 years 8 months ago
2004
IEEE
In a Simultaneous Multithreaded (SMT) architecture, the front end of a superscalar is adapted in order to be able to fetch from several threads while the back end is shared among ...
160
click to vote
DAC
2007
ACM
16 years 5 months ago
2007
ACM
Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network a...
137
click to vote
DAC
2004
ACM
16 years 5 months ago
2004
ACM
As process technology migrates to deep submicron with feature size less than 100nm, global wire delay is becoming a major hindrance in keeping the latency of intra-chip communicat...
117
click to vote
HPCA
2003
IEEE
16 years 4 months ago
2003
IEEE
Several manufacturers have recently announced the first simultaneous-multithreaded processors, both as single CPUs and as components of multi-CPU chips. All are small scale, compr...