This work is devoted to present the design and implementation of Alfa-1, a simulated computer with educational purposes. The DEVS formalism was used to attack the complexity of th...
Much of the improvement in computer performance over the last twenty years has come from faster transistors and architectural advances that increase parallelism. Historically, par...
Stephen W. Keckler, William J. Dally, Daniel Maski...
This paper explores an architecture for parallel independent computations of inner products over the direct product ring . The structure is based on the polynomial mapping of the ...
Wenzhe Luo, Graham A. Jullien, Neil M. Wigley, Wil...
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
With the multitude of existing and upcoming wireless standards, it is becoming increasingly difficult for hardware-only baseband processing solutions to adapt to the rapidly chan...
Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, ...