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131
Voted
INFOCOM
2007
IEEE
15 years 11 months ago
2007
IEEE
Next-generation high-end Network Processors (NP) must address demands from both diversified applications and ever-increasing traffic pressure. One major challenge is to design an e...
152
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IPPS
2003
IEEE
15 years 10 months ago
2003
IEEE
The available Instruction Level Parallelism in Java bytecode (Java-ILP) is not readily exploitable using traditional in-order or out-of-order issue mechanisms due to dependencies ...
131
Voted
DAC
2010
ACM
15 years 8 months ago
2010
ACM
Complex embedded systems have always been heterogeneous multicore systems. Because of the tight constraints on power, performance and cost, this situation is not likely to change a...
128
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ISCA
1995
IEEE
15 years 8 months ago
1995
IEEE
One can e ectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential bene ts of predicated execution are hig...
129
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DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper presents the Block Processing Engine (BPE), an Application Specific Instruction-Set Processor (ASIP) explicitly designed for the implementation of multistandard wireles...