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» Processor Architectures for Ontogenesis
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PARELEC
2000
IEEE
15 years 8 months ago
Implementation of an Adaptive Reconfigurable Group Organized (ARGO) Parallel Architecture
The purpose of this paper is to demonstrate the implementation of an adaptable parallel architecture capable of system to task adaptation. The system implementation was based on X...
Lucas Szajek, Lev Kirischian
IFIP
2001
Springer
15 years 8 months ago
A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation
: A new efficient type I architecture for motion estimation in video sequences based on the Full-Search Block-Matching (FSBM) algorithm is proposed in this paper. This architecture...
Nuno Roma, Leonel Sousa
DAC
1999
ACM
16 years 5 months ago
LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures
Abstract { This paper presents the machine description language LISA for the generation of bitand cycle accurate models of DSP processors. Based on a behavioral operation descripti...
Stefan Pees, Andreas Hoffmann, Vojin Zivojnovic, H...
CSE
2008
IEEE
15 years 5 months ago
A High-Throughput Multi-cluster NoC Architecture
During the last years a large number of research works has focused on problems related to multi-core processors. Due to the possibilities of many cores, the number of opportunitie...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
FCCM
2005
IEEE
84views VLSI» more  FCCM 2005»
15 years 9 months ago
Prototyping Architectural Support for Program Rollback Using FPGAs
This paper presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compile...
Radu Teodorescu, Josep Torrellas