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» Processor Verification with hwBugHunt
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DAC
2006
ACM
14 years 12 months ago
Shielding against design flaws with field repairable control logic
Correctness is a paramount attribute of any microprocessor design; however, without novel technologies to tame the increasing complexity of design verification, the amount of bugs...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
BCS
2008
14 years 11 days ago
Hardware Dependability in the Presence of Soft Errors
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
Ashish Darbari, Bashir M. Al-Hashimi
HICSS
2006
IEEE
164views Biometrics» more  HICSS 2006»
14 years 5 months ago
A Methodology for Generating Application-Specific Heterogeneous Processor Arrays
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
Stephen D. Craven, Cameron Patterson, Peter M. Ath...
DATE
2010
IEEE
204views Hardware» more  DATE 2010»
14 years 4 months ago
Assertion-based verification of RTOS properties
— Today, mobile and embedded real time systems have to cope with the migration and allocation of multiple software tasks running on top of a real time operating system (RTOS) res...
Marcio F. S. Oliveira, Henning Zabel, Wolfgang M&u...
DAC
1999
ACM
14 years 3 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...