Exploiting processor groups is becoming increasingly important for programming next-generation high-end systems composed of tens or hundreds of thousands of processors. This paper...
Jarek Nieplocha, Manojkumar Krishnan, Bruce Palmer...
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
Many commercially available embedded processors are capable of extending their base instruction set for a specific domain of applications. While steady progress has been made in t...
The Cell is a heterogeneous multicore processor that has attracted much attention in the HPC community. The bulk of the computational workload on the Cell processor is carried by ...
C. Devi Sudheer, T. Nagaraju, Pallav K. Baruah, As...
This paper describes how a superscalar in-order processor must be modified to support Simultaneous Multithreading (SMT) such that time-predictability is preserved for hard real-ti...