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DSN
2007
IEEE
14 years 3 months ago
Superscalar Processor Performance Enhancement through Reliable Dynamic Clock Frequency Tuning
Synchronous circuits are typically clocked considering worst case timing paths so that timing errors are avoided under all circumstances. In the case of a pipelined processor, thi...
Viswanathan Subramanian, Mikel Bezdek, Naga Durga ...
SBCCI
2006
ACM
200views VLSI» more  SBCCI 2006»
14 years 3 months ago
REDEFIS: a system with a redefinable instruction set processor
The growing complexity and production cost of processor-based systems have imposed big constraints in SoC design of new systems. GPPs and ASICs are unable to fit the tight perform...
Victor M. Goulart Ferreira, Lovic Gauthier, Takayu...
ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
14 years 2 months ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
RTSS
2002
IEEE
14 years 2 months ago
Soft Real- Time Scheduling on Simultaneous Multithreaded Processors
Simultaneous multithreading (SMT) improves processor throughput by processing instructions from multiple threads each cycle. This is the first work to explore soft real-time sche...
Rohit Jain, Christopher J. Hughes, Sarita V. Adve
PE
2007
Springer
137views Optimization» more  PE 2007»
13 years 8 months ago
A prediction method for job runtimes on shared processors: Survey, statistical analysis and new avenues
Grid computing is an emerging technology by which huge numbers of processors over the world create a global source of processing power. Their collaboration makes it possible to pe...
Menno Dobber, Robert D. van der Mei, Ger Koole