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GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
14 years 2 months ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...
ASPLOS
2012
ACM
12 years 4 months ago
Comprehensive kernel instrumentation via dynamic binary translation
Dynamic binary translation (DBT) is a powerful technique that enables fine-grained monitoring and manipulation of an existing program binary. At the user level, it has been emplo...
Peter Feiner, Angela Demke Brown, Ashvin Goel
IPPS
2010
IEEE
13 years 6 months ago
Profitability-based power allocation for speculative multithreaded systems
With the shrinking of transistors continuing to follow Moore's Law and the non-scalability of conventional outof-order processors, multi-core systems are becoming the design ...
Polychronis Xekalakis, Nikolas Ioannou, Salman Kha...
DAC
2003
ACM
14 years 9 months ago
Extending the lifetime of a network of battery-powered mobile devices by remote processing: a markovian decision-based approach
This paper addresses the problem of extending the lifetime of a batterypowered mobile host in a client-server wireless network by using task migration and remote processing. This ...
Peng Rong, Massoud Pedram
ISLPED
2004
ACM
159views Hardware» more  ISLPED 2004»
14 years 1 months ago
Dynamic voltage scaling for systemwide energy minimization in real-time embedded systems
Traditionally, dynamic voltage scaling (DVS) techniques have focused on minimizing the processorenergy consumption as opposed to the entire system energy consumption. The slowdown...
Ravindra Jejurikar, Rajesh K. Gupta