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MICRO
2008
IEEE
118views Hardware» more  MICRO 2008»
14 years 1 months ago
Notary: Hardware techniques to enhance signatures
Hardware signatures have been recently proposed as an efficient mechanism to detect conflicts amongst concurrently running transactions in transactional memory systems (e.g., Bulk...
Luke Yen, Stark C. Draper, Mark D. Hill
FCCM
2006
IEEE
101views VLSI» more  FCCM 2006»
14 years 1 months ago
A Type Architecture for Hybrid Micro-Parallel Computers
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
FPL
2005
Springer
149views Hardware» more  FPL 2005»
14 years 1 months ago
Heterogeneity Exploration for Multiple 2D Filter Designs
Many image processing applications require fast convolution of an image with a set of large 2D filters. Field - Programmable Gate Arrays (FPGAs) are often used to achieve this go...
Christos-Savvas Bouganis, Peter Y. K. Cheung, Geor...
TVCG
2008
192views more  TVCG 2008»
13 years 7 months ago
Heads Up and Camera Down: A Vision-Based Tracking Modality for Mobile Mixed Reality
Anywhere Augmentation pursues the goal of lowering the initial investment of time and money necessary to participate in mixed reality work, bridging the gap between researchers in ...
Stephen DiVerdi, Tobias Höllerer
VLSI
2007
Springer
14 years 1 months ago
A low-power deblocking filter architecture for H.264 advanced video coding
Abstract— In this paper, a low-power deblocking filter architecture for H.264/AVC is proposed. A hybrid filtering order has been adopted to boost the speed of the deblocking ...
Jaemoon Kim, Sangkwon Na, Chong-Min Kyung