1530 search results - page 287 / 306 » Programmable motion effects |
FPGA
2001
ACM
14 years 10 days ago
2001
ACM
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to connect wires (buffered, unbuffered, fast or slow) and the topology of the inte...
FCCM
2000
IEEE
14 years 8 days ago
2000
IEEE
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
SC
2000
ACM
14 years 6 days ago
2000
ACM
The current trend in HPC hardware is towards clusters of shared-memory (SMP) compute nodes. For applications developers the major question is how best to program these SMP cluster...
CODES
1999
IEEE
14 years 5 days ago
1999
IEEE
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
FCCM
1999
IEEE
14 years 5 days ago
1999
IEEE
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...