1063 search results - page 12 / 213 » Programming Methodologies in GCLA |
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
— In deep sub-micron technologies, process variations can cause significant path delay and clock skew uncertainties thereby lead to timing failure and yield loss. In this paper,...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Soft error reliability is increasingly becoming a first-order design concern for microprocessors, as a result of higher transistor counts, shrinking device geometries and lowering ...
OOPSLA
2010
Springer
13 years 5 months ago
2010
Springer
This poster presents a design language and a tool suite covering the development life-cycle of a Sense/Compute/Control (SCC) application. This language makes it possible to define...
ISVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
The new design challenges imposed by the increasing difficulties of today’s electronic systems obligated designers to develop new methodologies. System-level design and Platfor...