An experiment has been designed to evaluate multiple testing techniques for combinational circuits. To perform the experiment, a 25k gate CMOS Test Chip has been designed, manufac...
Piero Franco, William D. Farwell, Robert L. Stokes...
The purpose of this paper is to describe how computer-aided test generation methods can benefit from the time features and extensions to MSC, SDL and TTCN which are either already ...
This article discusses mutation testing strategies in the context of refinement. Here, a novel generalization of mutation testing techniques is presented to be applied to contract...
This paper describes an OMAP-based real-time test bench to find the Pareto frontier of an H.264/SVC decoder within a distortion-energy optimization space. A metric to estimate vide...
F. Pescador, E. Juarez, D. Samper, C. Sanz, Micka&...
The goal of testing is to distinguish between a number of hypotheses about a systemfor example, dierent diagnoses of faults by applying input patterns and verifying or falsifying t...