689 search results - page 4 / 138 » Proposal of High Level Architecture Extension |
DANCE
2002
IEEE
14 years 3 months ago
2002
IEEE
This paper describes the design, implementation and performance of an open, high performance, dynamically extensible router under development at Washington University in St. Louis...
CAMP
2005
IEEE
14 years 25 days ago
2005
IEEE
Abstract— In this paper we address the problem of the architectural exploration from the energy/performance point of view of a VLIW processor for embedded systems. We also consid...
ISCAS
2008
IEEE
14 years 5 months ago
2008
IEEE
— Reordered normal basis is a certain permutation of a type II optimal normal basis. In this paper, a high speed design of a word level finite field multiplier using reordered ...
SAMOS
2004
Springer
14 years 4 months ago
2004
Springer
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
ICRA
2005
IEEE
14 years 4 months ago
2005
IEEE
— The Intelligent Robotics Group at NASA Ames Research Center has developed a new mobile robot hardware architecture designed for extensibility and reconfigurability. Currently ...