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ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
16 years 1 months ago
Correct-by-construction microarchitectural pipelining
— This paper presents a method for correct-by-construction microarchitectural pipelining that handles cyclic systems with dependencies between iterations. Our method combines pre...
Timothy Kam, Michael Kishinevsky, Jordi Cortadella...
ICCAD
2006
IEEE
111views Hardware» more  ICCAD 2006»
16 years 1 months ago
State re-encoding for peak current minimization
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
Shih-Hsu Huang, Chia-Ming Chang, Yow-Tyng Nieh
SOSP
2007
ACM
16 years 1 months ago
TxLinux: using and managing hardware transactional memory in an operating system
TxLinux is a variant of Linux that is the first operating system to use hardware transactional memory (HTM) as a synchronization primitive, and the first to manage HTM in the sc...
Christopher J. Rossbach, Owen S. Hofmann, Donald E...
ICPP
2009
IEEE
15 years 11 months ago
Exploiting Simulation Slack to Improve Parallel Simulation Speed
Parallel simulation is a technique to accelerate microarchitecture simulation of CMPs by exploiting the inherent parallelism of CMPs. In this paper, we explore the simulation para...
Jianwei Chen, Murali Annavaram, Michel Dubois
IEEEPACT
2008
IEEE
15 years 11 months ago
The PARSEC benchmark suite: characterization and architectural implications
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
Christian Bienia, Sanjeev Kumar, Jaswinder Pal Sin...