352 search results - page 21 / 71 » Quantifying Instruction Criticality |
IPMI
2009
Springer
14 years 11 months ago
2009
Springer
We present a novel framework for characterizing signals in images using techniques from computational algebraic topology. This technique is general enough for dealing with noisy mu...
HPCA
2003
IEEE
14 years 11 months ago
2003
IEEE
To continue to improve processor performance, microarchitects seek to increase the effective instruction level parallelism (ILP) that can be exploited in applications. A fundament...
ICCD
1999
IEEE
14 years 3 months ago
1999
IEEE
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
APCSAC
2004
IEEE
14 years 2 months ago
2004
IEEE
Abstract. While the fetch unit has been identified as one of the major bottlenecks of Simultaneous Multithreading architecture, several fetch schemes were proposed by prior works t...
HPCA
2005
IEEE
14 years 11 months ago
2005
IEEE
Long-latency loads are critical in today's processors due to the ever-increasing speed gap with memory. Not only do these loads block the execution of dependent instructions,...