76 search results - page 4 / 16 » Quantifying instruction criticality for shared memory multip... |
ISCA
1995
IEEE
13 years 11 months ago
1995
IEEE
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...
HPCC
2009
Springer
14 years 2 days ago
2009
Springer
—The potential for destructive interference between running processes is increased as Chip Multiprocessors (CMPs) share more on-chip resources. We believe that understanding the ...
CORR
2011
Springer
13 years 2 months ago
2011
Springer
The memory consistency model is a fundamental system property characterizing a multiprocessor. The relative merits of strict versus relaxed memory models have been widely debated ...
ASPLOS
1998
ACM
13 years 11 months ago
1998
ACM
Database applications such as online transaction processing (OLTP) and decision support systems (DSS) constitute the largest and fastest-growing segment of the market for multipro...
HIPC
1999
Springer
13 years 11 months ago
1999
Springer
Abstract. In this work we put into evidence how the memory performance of a WebServer machine may depend on the sharing induced by process migration. We considered a shared-bus sha...