211 search results - page 22 / 43 » REDEFIS: a system with a redefinable instruction set process... |
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
Communication overheads are one of the fundamental challenges in a multiprocessor system. As the number of processors on a chip increases, communication overheads and the distribu...
ICS
2007
Tsinghua U.
14 years 1 months ago
2007
Tsinghua U.
Software or hardware data cache prefetching is an efficient way to hide cache miss latency. However effectiveness of the issued prefetches have to be monitored in order to maximi...
FPL
2004
Springer
14 years 1 months ago
2004
Springer
ASIPs and reconfigurable processors are architectural choices to extend the capabilities of a given processor. ASIPs suffer from fixed hardware after design, while ASIPs and reconf...
CODES
2009
IEEE
13 years 11 months ago
2009
IEEE
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
ICCD
2005
IEEE
14 years 1 months ago
2005
IEEE
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...