211 search results - page 9 / 43 » REDEFIS: a system with a redefinable instruction set process... |
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
IJCSA
2008
13 years 7 months ago
2008
Vector extensions for general purpose processors are an efficient feature to address the growing performance demand of multimedia and computer vision applications. Embedded proces...
RSP
2003
IEEE
14 years 25 days ago
2003
IEEE
With advances in semiconductor technology, processors are becoming larger and more complex. Future processor designers will face an enormous design space, and must evaluate more a...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
We present a novel technique to secure the execution of a processor against the execution of malicious code (trojans, viruses). The main idea is to permute parts of the opcode val...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Code density is an important issue in memory constrained systems. Some RISC processor, e.g. the THUMB extension in the ARM processor, supports aggressive code size reduction even ...