375 search results - page 28 / 75 » RTL power estimation and optimization |
SAMOS
2004
Springer
14 years 1 months ago
2004
Springer
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
LCN
2008
IEEE
14 years 2 months ago
2008
IEEE
—Providing energy-efficient continuous data collection services is of paramount importance to Wireless Sensor Network (WSN) applications. This paper proposes a new power manageme...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
We propose a method for power optimization that considers glitch reduction by gate sizing based on the statistical estimation of glitch transitions. Our method reduces not only th...
ISLPED
1999
ACM
13 years 12 months ago
1999
ACM
Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
DAGSTUHL
2006
13 years 9 months ago
2006
Long-term reliability of processors in embedded systems is experiencing growing attention since decreasing feature sizes and increasing power consumption have a negative influence...