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ISSS
1996
IEEE
169views Hardware» more  ISSS 1996»
13 years 11 months ago
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
Alessandro Balboni, William Fornaciari, M. Vincenz...
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
14 years 1 months ago
Efficient testbench code synthesis for a hardware emulator system
: - The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and software developers, leading to...
Ioannis Mavroidis, Ioannis Papaefstathiou
FPL
2009
Springer
117views Hardware» more  FPL 2009»
14 years 6 days ago
Data parallel FPGA workloads: Software versus hardware
Commercial soft processors are unable to effectively exploit the data parallelism present in many embedded systems workloads, requiring FPGA designers to exploit it (laboriously) ...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...
DATE
2008
IEEE
121views Hardware» more  DATE 2008»
14 years 2 months ago
Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures
As levels of parallelism are becoming increasingly complex in multiprocessor architectures, GALS, and asynchronous circuits, methodologies and software tools are needed to verify ...
Nicolas Coste, Hubert Garavel, Holger Hermanns, Ri...
DATE
1999
IEEE
172views Hardware» more  DATE 1999»
13 years 12 months ago
An Object-Based Executable Model for Simulation of Real-Time Hw/Sw Systems
This paper describes a simulation technique for RealTime Hw/Sw systems based on an object executable model. It allows designers to seamlessly estimate and verify their solutions f...
Olivier Pasquier, Jean Paul Calvez