132 search results - page 20 / 27 » Re-Routing in Circuit Switched Networks |
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract—Power/ground noise is a major source of VLSI circuit timing variations. This work aims to reduce clock network induced power noise by assigning different signal polariti...
SLIP
2003
ACM
14 years 23 days ago
2003
ACM
Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delay...
FPGA
2003
ACM
14 years 23 days ago
2003
ACM
How does multilevel metalization impact the design of FPGA interconnect? The availability of a growing number of metal layers presents the opportunity to use wiring in the thirddi...
ICCD
2003
IEEE
14 years 4 months ago
2003
IEEE
Modern processors rely heavily on broadcast networks to bypass instruction results to dependent instructions in the pipeline. However, as clock rates increase, architectures get w...
BROADNETS
2006
IEEE
13 years 11 months ago
2006
IEEE
Traffic grooming continues to be a rich area of research in the context of WDM optical networks. We provide an overview of the optical and electronic grooming techniques available...