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» ReCycle: : pipeline adaptation to tolerate process variation
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DATE
2007
IEEE
138views Hardware» more  DATE 2007»
14 years 1 months ago
Low-overhead circuit synthesis for temperature adaptation using dynamic voltage scheduling
—Increasing power density causes die overheating due to limited cooling capacity of the package. Conventional thermal management techniques e.g. logic shutdown, clock gating, fre...
Swaroop Ghosh, Swarup Bhunia, Kaushik Roy
ICIP
2003
IEEE
14 years 9 months ago
Adaptive system on a chip (ASOC): a backbone for power-aware signal processing cores
For motion estimation (ME) and discrete cosine transform (DCT) of MPEG video encoding, content variation and perceptual tolerance in video signals can be exploited to gracefully t...
Andrew Laffely, Jian Liang, Russell Tessier, Wayne...
NA
2011
301views Computer Vision» more  NA 2011»
13 years 2 months ago
Automatic grid control in adaptive BVP solvers
Grid adaptation in two-point boundary value problems is usually based on mapping a uniform auxiliary grid to the desired nonuniform grid. Here we combine this approach with a new ...
Gernot Pulverer, Gustaf Söderlind, Ewa Weinm&...
IOLTS
2005
IEEE
141views Hardware» more  IOLTS 2005»
14 years 28 days ago
A Novel On-Chip Delay Measurement Hardware for Efficient Speed-Binning
With the aggressive scaling of the CMOS technology parametric variation of the transistor threshold voltage causes significant spread in the circuit delay as well as leakage spect...
Arijit Raychowdhury, Swaroop Ghosh, Kaushik Roy
DAC
2009
ACM
14 years 11 hour ago
Vicis: a reliable network for unreliable silicon
Process scaling has given designers billions of transistors to work with. As feature sizes near the atomic scale, extensive variation and wearout inevitably make margining unecono...
David Fick, Andrew DeOrio, Jin Hu, Valeria Bertacc...