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JALC
2007
79views more  JALC 2007»
13 years 8 months ago
Two-Way Finite Automata with a Write-Once Track
The basic finite automata model has been extended over the years with different acceptance modes (nondeterminism, alternation), new or improved devices (two-way heads, pebbles, ...
Berke Durak
GLVLSI
2010
IEEE
187views VLSI» more  GLVLSI 2010»
14 years 1 months ago
Write activity reduction on flash main memory via smart victim cache
Flash Memory is a desirable candidate for main memory replacement in embedded systems due to its low leakage power consumption, higher density and non-volatility characteristics. ...
Liang Shi, Chun Jason Xue, Jingtong Hu, Wei-Che Ts...
STOC
2004
ACM
158views Algorithms» more  STOC 2004»
14 years 9 months ago
Collective asynchronous reading with polylogarithmic worst-case overhead
The Collect problem for an asynchronous shared-memory system has the objective for the processors to learn all values of a collection of shared registers, while minimizing the tot...
Bogdan S. Chlebus, Dariusz R. Kowalski, Alexander ...
PODC
2009
ACM
14 years 9 months ago
Max registers, counters, and monotone circuits
A method is given for constructing a max register, a linearizable, wait-free concurrent data structure that supports a write operation and a read operation that returns the larges...
James Aspnes, Hagit Attiya, Keren Censor
ICDCS
2000
IEEE
14 years 1 months ago
Static and Adaptive Data Replication Algorithms for Fast Information Access in Large Distributed Systems
Creating replicas of frequently accessed objects across a read-intensive network can result in large bandwidth savings which, in turn, can lead to reduction in user response time....
Thanasis Loukopoulos, Ishfaq Ahmad