551 search results - page 50 / 111 » Realizability of Real-Time Logics |
144
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ICCD
1993
IEEE
15 years 10 months ago
1993
IEEE
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
139
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DAC
2004
ACM
16 years 6 months ago
2004
ACM
This paper shows a method to decompose a given multipleoutput circuit into two circuits with intermediate outputs. We use a BDD for characteristic function (BDD for CF) to represe...
147
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PRDC
2007
IEEE
16 years 4 days ago
2007
IEEE
Model-based development has become state of the art in software engineering. Unfortunately, the used code generators often focus on the pure application functionality. Features li...
288
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AWCC
2004
Springer
15 years 11 months ago
2004
Springer
This paper imports the fuzzy logic into image retrieval to deal with the vagueness and ambiguity of human judgment of image similarity. Our retrieval system has the following prop...
188
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FLAIRS
2007
15 years 8 months ago
2007
This work addresses the issue of prioritized reasoning in the context of logic programming. The case of preference conditions involving atoms is considered and a refinement of th...