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ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
14 years 1 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
14 years 1 months ago
Fine-grain thermal profiling and sensor insertion for FPGAs
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
Somsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci...
ISCAS
2008
IEEE
170views Hardware» more  ISCAS 2008»
14 years 1 months ago
Integrated circuit implementation of a cortical neuron
— This paper presents an analogue integrated circuit implementation of a cortical neuron model. The VLSI chip prototype has been implemented in a 0.35 µm CMOS technology. The si...
Jayawan H. B. Wijekoon, Piotr Dudek
FPL
2001
Springer
92views Hardware» more  FPL 2001»
13 years 12 months ago
Secure Configuration of Field Programmable Gate Arrays
Although SRAM programmed Field Programmable Gate Arrays (FPGA's) have come to dominate the industry due to their density and performance advantages over non-volatile technolog...
Tom Kean
FPL
2010
Springer
131views Hardware» more  FPL 2010»
13 years 5 months ago
Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique
The paper describes application of the clock-gating techniques, often used in ASIC designs, to the field of FPGAbased systems. The clock-gating techniques are used to reduce the to...
Antonin Hermanek, Michal Kunes, Milan Tichý