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DATE
2004
IEEE
136views Hardware» more  DATE 2004»
15 years 9 months ago
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems
Recently a lot of multimedia applications are emerging on portable appliances. They require both the flexibility of upgradeable devices (traditionally software based) and a powerf...
Michele Borgatti, Andrea Capello, Umberto Rossi, J...
EWSA
2005
Springer
15 years 11 months ago
Managing Dynamic Reconfiguration in Component-Based Systems
We propose a meta-framework called ‘Plastik’ which i) supports the specification and creation of runtime component-framework-based software systems and ii) facilitates and mana...
Thaís Vasconcelos Batista, Ackbar Joolia, G...
IPPS
1999
IEEE
15 years 10 months ago
Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System
The known fast sequential algorithms for multiplying two N N matrices (over an arbitrary ring) have time complexity ON , where 2 3. The current best value of is less than 2.3755....
Keqin Li, Victor Y. Pan
AHS
2007
IEEE
251views Hardware» more  AHS 2007»
15 years 10 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
ERSA
2009
129views Hardware» more  ERSA 2009»
15 years 3 months ago
Data path Configuration Time Reduction for Run-time Reconfigurable Systems
- The FPGA (re)configuration is a time-consuming process and a bottleneck in FPGA-based Run-Time Reconfigurable (RTR) systems. In this paper, we present a High Level Synthesis (HLS...
Mahmood Fazlali, Ali Zakerolhosseini, Mojtaba Sabe...