Sciweavers

119 search results - page 11 / 24
» Reconfigurable circuit design with nanomaterials
Sort
View
FPGA
2007
ACM
114views FPGA» more  FPGA 2007»
14 years 1 months ago
Design of a logic element for implementing an asynchronous FPGA
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
Scott C. Smith
ISCAS
2003
IEEE
69views Hardware» more  ISCAS 2003»
14 years 22 days ago
A modular sensor microsystem utilizing a universal interface circuit
The performance features of MEMS transducers allow the development of a new class of small, low-power sensor microsystems which utilize a suite of sensors to support a wide range ...
Andrew Mason, N. Yazdi, J. Zhang, Z. Sainudeen
CC
2008
Springer
240views System Software» more  CC 2008»
13 years 9 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
DATE
2009
IEEE
155views Hardware» more  DATE 2009»
13 years 11 months ago
Automatically mapping applications to a self-reconfiguring platform
The inherent reconfigurability of SRAM-based FPGAs enables the use of configurations optimized for the problem at hand. Optimized configurations are smaller and faster than their g...
Karel Bruneel, Fatma Abouelella, Dirk Stroobandt
AHS
2006
IEEE
86views Hardware» more  AHS 2006»
14 years 1 months ago
An Efficient Technique for Preventing Single Event Disruptions in Synchronous and Reconfigurable Architectures
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...
Sajid Baloch, Tughrul Arslan, Adrian Stoica