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» Reconfigurable trusted computing in hardware
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DDECS
2007
IEEE
143views Hardware» more  DDECS 2007»
14 years 4 months ago
Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
Pavel Kubalík, Jirí Kvasnicka, Hana ...
AHS
2006
IEEE
124views Hardware» more  AHS 2006»
14 years 4 months ago
Embedded Reconfigurable Array Fabrics for Efficient Implementation of Image Compression Techniques
The discrete wavelet Transform (DWT), as defined by the Image Compression Standard JPEG-2000, is one of the most time-consuming computations which cannot be efficiently executed o...
Sajid Baloch, Tughrul Arslan, Adrian Stoica
ASAP
2008
IEEE
117views Hardware» more  ASAP 2008»
13 years 12 months ago
Reconfigurable acceleration of microphone array algorithms for speech enhancement
Microphone arrays play an important role in noise reduction and speech enhancement. Their algorithms are based on beamforming, which reduces the level of localized and ambient noi...
Ka Fai Cedric Yiu, Chun Hok Ho, Nedelko Grbic, Yao...
DAC
2004
ACM
14 years 3 months ago
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these...
Philip Brisk, Adam Kaplan, Majid Sarrafzadeh
FCCM
2000
IEEE
122views VLSI» more  FCCM 2000»
14 years 2 months ago
Evaluating Hardware Compilation Techniques
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
Markus Weinhardt, Wayne Luk