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DAC
1996
ACM
13 years 11 months ago
A Boolean Approach to Performance-Directed Technology Mapping for LUT-Based FPGA Designs
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
Christian Legl, Bernd Wurth, Klaus Eckl
ICCAD
2005
IEEE
125views Hardware» more  ICCAD 2005»
14 years 4 months ago
Robust mixed-size placement under tight white-space constraints
A novel and very simple correct-by-construction top-down methodology for high-utilization mixed-size placement is presented. The PolarBear algorithm combines recursive cutsize-dri...
Jason Cong, Michail Romesis, Joseph R. Shinnerl
CCR
2002
103views more  CCR 2002»
13 years 7 months ago
King: estimating latency between arbitrary internet end hosts
The ability to estimate network latencies between arbitrary Internet end hosts would enable new measurement studies and applications, such as investigating routing path inefficien...
P. Krishna Gummadi, Stefan Saroiu, Steven D. Gribb...
SAGT
2009
Springer
163views Game Theory» more  SAGT 2009»
14 years 1 months ago
Nash Equilibria and the Price of Anarchy for Flows over Time
We study Nash equilibria and the price of anarchy in the context of flows over time. Many results on static routing games have been obtained over the last ten years. In flows ov...
Ronald Koch, Martin Skutella
WCNC
2008
IEEE
14 years 1 months ago
Connectivity-Aware Network Maintenance via Relays Deployment
— In this paper, we address the network maintenance problem, in which we aim to maximize the lifetime of a sensor network by adding a set of relays to it. The network lifetime is...
Ahmed S. Ibrahim, Karim G. Seddik, K. J. Ray Liu