663 search results - page 80 / 133 » Reducing Compilation Time Overhead in Compiled Simulators |
ISCA
2000
IEEE
14 years 13 days ago
2000
IEEE
Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads. This paper...
SIGMOD
2003
ACM
14 years 8 months ago
2003
ACM
We consider an environment where distributed data sources continuously stream updates to a centralized processor that monitors continuous queries over the distributed data. Signif...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
Execution-driven simulators are often used for power/energy and performance evaluation. Simulators can provide semantic details but they provide insufficient speed and accuracy f...
ISLPED
2003
ACM
14 years 1 months ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
IEEEINTERACT
2002
IEEE
14 years 29 days ago
2002
IEEE
Smaller input data sets such as the test and the train input sets are commonly used in simulation to estimate the impact of architecture/micro-architecture features on the perform...