Sciweavers

324 search results - page 28 / 65
» Reducing Expression Size Using Rule-Based Integration
Sort
View
ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
14 years 2 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon
ISVLSI
2008
IEEE
136views VLSI» more  ISVLSI 2008»
14 years 2 months ago
A Real Case of Significant Scan Test Cost Reduction
With the advent of nanometer technologies, the design size of integrated circuits is getting larger and the operation speed is getting faster. As a consequence, test cost is becom...
Selina Sha, Bruce Swanson
ICAS
2008
IEEE
274views Robotics» more  ICAS 2008»
14 years 2 months ago
Model-Driven Engineering of Multi-target Plastic User Interfaces
A Multi-target user interface is composed of a series of interconnected variations of the same user interfaces, but tailored for different targets or different contexts of use. Wh...
Benoît Collignon, Jean Vanderdonckt, Gaë...
SEMWIKI
2008
157views Data Mining» more  SEMWIKI 2008»
13 years 9 months ago
RDF Authoring in Wikis
Although the Semantic Web vision is gaining momentum and the underlying technologies are used in many different areas, there still seems to be no agreement on how they should be us...
Florian Schmedding, Christoph Hanke, Thomas Hornun...
FPGA
2005
ACM
122views FPGA» more  FPGA 2005»
14 years 1 months ago
Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability
Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for different circuit elements and unused circuit elements can be powe...
Yan Lin, Fei Li, Lei He