53 search results - page 6 / 11 » Reducing Power Consumption of Dedicated Processors Through I... |
ASAP
2009
IEEE
14 years 6 months ago
2009
IEEE
The advent of the mobile age has heavily changed the requirements of today’s communication devices. Data transmission over interference-prone wireless channels requires addition...
GECCO
2004
Springer
14 years 2 months ago
2004
Springer
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
DAC
1999
ACM
14 years 10 months ago
1999
ACM
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
HIPEAC
2009
Springer
14 years 25 days ago
2009
Springer
Abstract. Exposing more instruction-level parallelism in out-of-order superscalar processors requires increasing the number of dynamic in-flight instructions. However, large instru...
IPCCC
2006
IEEE
14 years 3 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...