135 search results - page 25 / 27 » Reducing Power Dissipation in SRAM during Test |
VTS
2005
IEEE
14 years 1 months ago
2005
IEEE
: This project involves the design of a CMOS RF RMS Detector that converts the RMS voltage amplitude of an RF signal to a DC voltage. Its high input impedance and small area make i...
IJCAI
2007
13 years 9 months ago
2007
Caching, symmetries, and search with decomposition are powerful techniques for pruning the search space of constraint problems. In this paper we present an innovative way of effi...
AGILEDC
2007
IEEE
14 years 2 months ago
2007
IEEE
Projects combining agile methods with CMMI1 are more successful in producing higher quality software that more effectively meets customer needs at a faster pace. Systematic Softwa...
AGILEDC
2009
IEEE
14 years 22 days ago
2009
IEEE
Projects combining agile methods with CMMI1 are more successful in producing higher quality software that more effectively meets customer needs at a faster pace. Systematic Softwa...
ISLPED
2004
ACM
14 years 1 months ago
2004
ACM
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...