293 search results - page 30 / 59 » Reducing Power with Performance Constraints for Parallel Spa... |
SPAA
2010
ACM
13 years 7 months ago
2010
ACM
We present a scheduling algorithm of stream programs for multi-core architectures called team scheduling. Compared to previous multi-core stream scheduling algorithms, team schedu...
ICPPW
2006
IEEE
14 years 1 months ago
2006
IEEE
Trust, the fundamental basis of ‘cooperation’ – one of the most important characteristics for the performance of pervasive ad hoc network-- is under serious threat with the ...
ISLPED
2007
ACM
13 years 9 months ago
2007
ACM
A 0.4-V UWB digital baseband processor has been fabricated in a standard-VT 90-nm CMOS technology. The baseband processor operates at an ultra-low supply voltage to reduce energy ...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Abstract-- Network processors (NPs) have emerged as successful platforms to providing both high performance and flexibility in building powerful routers. Typical NPs incorporate mu...
ITC
2002
IEEE
14 years 17 days ago
2002
IEEE
Significant reductions in test application times can be achieved through parallelizing core tests; however, simultaneous test of various cores may result in exceeding power thres...