54 search results - page 2 / 11 » Reducing code size with echo instructions |
PDPTA
2007
13 years 9 months ago
2007
- In this paper we experiment with two optimization techniques we are considering implementing in a parallelizing compiler that generates parallel code for a distributed-memory sys...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Code size and energy consumption are critical design concerns for embedded processors as they determine the cost of the overall system. Techniques such as reduced length instructi...
IEEEPACT
2006
IEEE
14 years 1 months ago
2006
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
CODES
2006
IEEE
13 years 11 months ago
2006
IEEE
Small area and code size are two critical design issues in most of embedded system designs. In this paper, we tackle these issues by customizing forwarding networks and instructio...
HPCC
2009
Springer
14 years 5 days ago
2009
Springer
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...