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ICPP
2009
IEEE
14 years 2 months ago
Speeding Up Distributed MapReduce Applications Using Hardware Accelerators
—In an attempt to increase the performance/cost ratio, large compute clusters are becoming heterogeneous at multiple levels: from asymmetric processors, to different system archi...
Yolanda Becerra, Vicenç Beltran, David Carr...
DAC
2010
ACM
13 years 11 months ago
Networks on Chips: from research to products
Research on Networks on Chips (NoCs) has spanned over a decade and its results are now visible in some products. Thus the seminal idea of using networking technology to address th...
Giovanni De Micheli, Ciprian Seiculescu, Srinivasa...
CORR
2011
Springer
168views Education» more  CORR 2011»
12 years 11 months ago
Robustness and modular structure in networks
Many complex systems, from power grids and the internet, to the brain and society, can be modeled using modular networks. Modules, densely interconnected groups of elements, often...
James P. Bagrow, Sune Lehmann, Yong-Yeol Ahn
FCCM
2006
IEEE
201views VLSI» more  FCCM 2006»
13 years 11 months ago
Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers
With advances in reconfigurable hardware, especially field-programmable gate arrays (FPGAs), it has become possible to use reconfigurable hardware to accelerate complex applicatio...
Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor...
COLT
1992
Springer
13 years 11 months ago
On the Computational Power of Neural Nets
This paper deals with finite size networks which consist of interconnections of synchronously evolving processors. Each processor updates its state by applying a "sigmoidal&q...
Hava T. Siegelmann, Eduardo D. Sontag