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DATE
2003
IEEE
93views Hardware» more  DATE 2003»
14 years 2 months ago
Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip
Managing the complexity of designing chips containing billions of transistors requires decoupling computation from communication. For the communication, scalable and compositional...
Edwin Rijpkema, Kees G. W. Goossens, Andrei Radule...
VIZSEC
2004
Springer
14 years 2 months ago
Managing attack graph complexity through visual hierarchical aggregation
We describe a framework for managing network attack graph complexity through interactive visualization, which includes hierarchical aggregation of graph elements. Aggregation coll...
Steven Noel, Sushil Jajodia
HPCA
2008
IEEE
14 years 9 months ago
Regional congestion awareness for load balance in networks-on-chip
Interconnection networks-on-chip (NOCs) are rapidly replacing other forms of interconnect in chip multiprocessors and system-on-chip designs. Existing interconnection networks use...
Paul Gratz, Boris Grot, Stephen W. Keckler
AICCSA
2005
IEEE
124views Hardware» more  AICCSA 2005»
14 years 2 months ago
On multicast scheduling and routing in multistage Clos networks
Multicast communication, which involves transmitting information from one node to multiple nodes, is a vital operation in both broadband integrated services digital networks (BISD...
Bin Tang
IPPS
2000
IEEE
14 years 1 months ago
Job Scheduling that Minimizes Network Contention due to both Communication and I/O
As communication and I/O traffic increase on the interconnection network of high-performance systems, network contention becomes a critical problem drastically reducing performan...
Jens Mache, Virginia Mary Lo, Sharad Garg