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EUROPAR
2010
Springer
13 years 7 months ago
Optimized On-Chip-Pipelined Mergesort on the Cell/B.E
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
Rikard Hultén, Christoph W. Kessler, Jö...
IEEEPACT
2002
IEEE
14 years 18 days ago
Increasing and Detecting Memory Address Congruence
A static memory reference exhibits a unique property when its dynamic memory addresses are congruent with respect to some non-trivial modulus. Extraction of this congruence inform...
Samuel Larsen, Emmett Witchel, Saman P. Amarasingh...
ISCA
1992
IEEE
113views Hardware» more  ISCA 1992»
13 years 11 months ago
Dynamic Dependency Analysis of Ordinary Programs
A quantitative analysis of program execution is essential to the computer architecture design process. With the current trend in architecture of enhancing the performance of unipr...
Todd M. Austin, Gurindar S. Sohi
EUROPAR
2008
Springer
13 years 9 months ago
Optimized Pipelined Parallel Merge Sort on the Cell BE
Chip multiprocessors designed for streaming applications such as Cell BE offer impressive peak performance but suffer from limited bandwidth to offchip main memory. As the number o...
Jörg Keller, Christoph W. Kessler
DATE
2005
IEEE
171views Hardware» more  DATE 2005»
14 years 1 months ago
Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems
As compared to a large spectrum of performance optimizations, relatively little effort has been dedicated to optimize other aspects of embedded applications such as memory space r...
Ozcan Ozturk, Hendra Saputra, Mahmut T. Kandemir, ...