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» Reducing power density through activity migration
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ICCD
2006
IEEE
109views Hardware» more  ICCD 2006»
14 years 4 months ago
Improving Scalability and Complexity of Dynamic Scheduler through Wakeup-Based Scheduling
This paper presents a new scheduling technique to improve the speed, power, and scalability of a dynamic scheduler. In a high-performance superscalar processor, the instruction sc...
Kuo-Su Hsiao, Chung-Ho Chen
BROADNETS
2004
IEEE
13 years 11 months ago
Random Asynchronous Wakeup Protocol for Sensor Networks
This paper presents Random Asynchronous Wakeup (RAW), a power saving technique for sensor networks that reduces energy consumption without significantly affecting the latency or c...
Vamsi Paruchuri, Shivakumar Basavaraju, Arjan Durr...
HPCA
2003
IEEE
14 years 8 months ago
Power-Aware Control Speculation through Selective Throttling
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
Juan L. Aragón, José González...
EUROSYS
2008
ACM
14 years 4 months ago
Task activity vectors: a new metric for temperature-aware scheduling
Non-uniform utilization of functional units in combination with hardware mechanisms such as clock gating leads to different power consumptions in different parts of a processor ch...
Andreas Merkel, Frank Bellosa
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
14 years 4 months ago
Simultaneous power and thermal integrity driven via stapling in 3D ICs
The existing work on via-stapling in 3D integrated circuits optimizes power and thermal integrity separately and uses steadystate thermal analysis. This paper presents the first ...
Hao Yu, Joanna Ho, Lei He