Sciweavers

83 search results - page 5 / 17
» Reducing power density through activity migration
Sort
View
ISCA
2010
IEEE
413views Hardware» more  ISCA 2010»
14 years 22 days ago
Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing
As CMOS scales beyond the 45nm technology node, leakage concerns are starting to limit microprocessor performance growth. To keep dynamic power constant across process generations...
Xiaochen Guo, Engin Ipek, Tolga Soyata
TNN
2010
216views Management» more  TNN 2010»
13 years 2 months ago
Simplifying mixture models through function approximation
Finite mixture model is a powerful tool in many statistical learning problems. In this paper, we propose a general, structure-preserving approach to reduce its model complexity, w...
Kai Zhang, James T. Kwok
ISLPED
2005
ACM
91views Hardware» more  ISLPED 2005»
14 years 1 months ago
LAP: a logic activity packing methodology for leakage power-tolerant FPGAs
As FPGAs enter the nanometer regime, several modifications are needed to reduce the increasing leakage power dissipation. Hence, this work presents some modifications to the FPG...
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
IPPS
2009
IEEE
14 years 2 months ago
Handling OS jitter on multicore multithreaded systems
Various studies have shown that OS jitter can degrade parallel program performance considerably at large processor counts. Most sources of system jitter fall broadly into 5 catego...
Pradipta De, Vijay Mann, Umang Mittaly
ICCAD
2007
IEEE
130views Hardware» more  ICCAD 2007»
14 years 4 months ago
Analysis and optimization of power-gated ICs with multiple power gating configurations
- Power gating is an efficient technique for reducing leakage power in electronic devices by disconnecting blocks idle for long periods of time from the power supply. Disconnecting...
Aida Todri, Malgorzata Marek-Sadowska, Shih-Chieh ...