We propose a layout-driven test-architecture design and optimization technique for core-based system-on-chips (SoCs) that are fabricated using three-dimensional (3D) integration. ...
Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. ...
Reliance on skilled developers reduces the return on investment for important software engineering tasks such as establishing program correctness. This position paper introduces a...
Many SOCs today contain both digital and analog embedded cores. Even though the test cost for such mixed-signal SOCs is significantly higher than that for digital SOCs, most prio...
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...
Abstract. Errors in a requirements model have prolonged detrimental effects on reliability, cost, and safety of a software system. It is very costly to fix these errors in later ...