The proliferation of Chip Multiprocessors (CMPs) has led to the integration of large on-chip caches. For scalability reasons, a large on-chip cache is often divided into smaller ba...
Ping Zhou, Bo Zhao, Yu Du, Yi Xu, Youtao Zhang, Ju...
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
This paper presents a network architecture to interconnect mixed-signal VLSI1 integrate-and-fire neural networks in a way that the timing of the neural network data is preserved. ...
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...